Please use this identifier to cite or link to this item: https://ir.swu.ac.th/jspui/handle/123456789/15275
Title: Independent BRM multi patterns with VFC
Authors: Tipsuwanporn V.
Tirasesth K.
Sattho U.
Witheephanich K.
Chuenarom S.
Keywords: DC motors
Modulation
Multiplying circuits
Oscillations
Speed control
Voltage control
Binary bit rate (BBR)
Binary rate multipliers (BRM)
Voltage to frequency conversion (VFC)
Electric converters
Issue Date: 2000
Abstract: In this paper voltage-to-frequency conversion (VFC) circuit with Binary Rate Multipliers (BRM) output is presented. We first analyze spectrum value and percentage of Binary Bit Rate (BBR) power then reject the repeated power values, and select only one BBR signal to construct BRM by linear combination. A VFC design with 1 to 5 volts (Vin) and ±2.5 volts (Vout) can generate BRM pattern (0 Hz - 39.0625 kHz) in sine, triangular, saw-tooth and square waveform. The average value of VFC output signal is fedback to input of the VFC in order to stabilize pattern for BRM transmission. The output patterns and frequencies can be controlled either independently or simultaneously.
URI: https://ir.swu.ac.th/jspui/handle/123456789/15275
https://www.scopus.com/inward/record.uri?eid=2-s2.0-2342557232&partnerID=40&md5=006fa0273d600b64fa1b7d7de442c866
Appears in Collections:Scopus 1983-2021

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